In the prior art, bipolar transistors have generally been fabricated by processes involving double diffusion of impurities; that is, the base and emitter zones of the transistor are successively formed by diffusion of electrically significant conductivity determining impurities, the base zone being formed by diffusion of impurities into a limited portion of an epitaxial layer, and the emitter zone being formed by diffusion with a limited portion of the base zone. In the bipolar transistor device thus fabricated, the resulting spreading resistance of the base zone imposes a lower limit upon the response time or switching time, typically of about 10 nanoseconds or more, which can be undesirably high for high speed applications where the desired frequency response can be as high as 10 GHz, corresponding to a response time of one-tenth nanosecond.
Another form of bipolar transistor is of the lateral structure; that is, the overall flow of minority charge carriers in the base region is parallel to the major surface of the semiconductor at which the emitter and collector are located. See, for example: P. R. Gray and R. G. Meyer, Analysis and Design of Analog Integrated Circuits, p. 91 (1977). Because of the way in which it is conventionally fabricated, such a transistor structure is ordinarily characterized by a base zone or region which is more lightly doped with impurities than is the collector. Consequently, in such a transistor structure, precautions must be taken to prevent the depletion region at the collector-base junction during operation from reaching the emitter; namely, widening the base region, and hence, undesirably increasing the switching time.
In an application filed concurrently herewith by the same inventors Ser. No. 141120, entitled "Short Channel Field Effect Transistors," a method is disclosed for fabricating FET's (field effect transistors) with metal silicide contacts, characterized by well-controlled, short channels, and hence high speed of response.